Virtual impedance analyzer design and implementation

Kai Chao Yao, Chin Wen Liao, Li Ling Chao, Fu Yu Lin

研究成果: Conference contribution

3 引文 斯高帕斯(Scopus)

摘要

In this research, the structure and design of virtual impedance analyzers are studied. The construction process is also described and introduced. This programmable virtual impedance analyzer is achieved by software part, Labview hardware part, DAQ card and some external circuits. The measurement functions include: (1) Impedance [Z] Display that has magnitude, phase, impedance and reactance (2) Display Settings that has visible section and scale (3) Measurement Frequency Control (4) Run Button (5)Display Window. In the illustrations, demonstrate the design of front panels and also proceed the measurement test of designed virtual impedance analyzer to show the capabilities.

原文English
主出版物標題Second International Conference on Innovative Computing, Information and Control, ICICIC 2007
發行者IEEE Computer Society
ISBN(列印)0769528821, 9780769528823
DOIs
出版狀態Published - 2007 一月 1
事件2nd International Conference on Innovative Computing, Information and Control, ICICIC 2007 - Kumamoto, Japan
持續時間: 2007 九月 52007 九月 7

出版系列

名字Second International Conference on Innovative Computing, Information and Control, ICICIC 2007

Other

Other2nd International Conference on Innovative Computing, Information and Control, ICICIC 2007
國家Japan
城市Kumamoto
期間07-09-0507-09-07

All Science Journal Classification (ASJC) codes

  • Computer Science(all)
  • Mechanical Engineering

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  • 引用此

    Yao, K. C., Liao, C. W., Chao, L. L., & Lin, F. Y. (2007). Virtual impedance analyzer design and implementation. 於 Second International Conference on Innovative Computing, Information and Control, ICICIC 2007 [4427716] (Second International Conference on Innovative Computing, Information and Control, ICICIC 2007). IEEE Computer Society. https://doi.org/10.1109/ICICIC.2007.618