Output current ripple-free PWM inverters

Ching Tsai Pan, Ching Ming Lai, Yu-Lin Juan

研究成果: Article

6 引文 斯高帕斯(Scopus)

摘要

In this brief, a simple modular passive ripple mirror circuit (PRMC) is proposed for eliminating the inherent high-frequency current ripple of pulsewidth modulation (PWM) inverters. The proposed passive circuit is robust in the sense of without containing either any power semiconductor switch or any extra control. Only the reflected high-frequency ripples are automatically induced and processed for proper cancellation with the original ripples. It turns out that not only the output power quality can be enhanced but also the inductance of the main power circuit can be reduced greatly. As an example, a single-phase PWM inverter is chosen for illustrating the effectiveness of the proposed PRMC. Experimental results show that the proposed PRMC can, indeed, achieve the desired performance.

原文English
文章編號5559409
頁(從 - 到)823-827
頁數5
期刊IEEE Transactions on Circuits and Systems II: Express Briefs
57
發行號10
DOIs
出版狀態Published - 2010 十月 1

    指紋

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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