TY - GEN
T1 - Global routing techniques for an automatic mixed analog/digital IC layout compiler
AU - Lin, Zhi Ming
PY - 1991
Y1 - 1991
N2 - Global routing techniques for an automated analog/digital IC layout compiler are presented. The global router routes in a net-by-net, high-sensitivity-net-first order. Minimum trees are searched for the interconnection of sensitive nets and power nets. For the routing of noise nets, the router provides a net-crossing-free terminal assignment between sensitive nets and noise nets for the routing of channels. Efficient terminal assignment and extraction techniques for the router are also presented.
AB - Global routing techniques for an automated analog/digital IC layout compiler are presented. The global router routes in a net-by-net, high-sensitivity-net-first order. Minimum trees are searched for the interconnection of sensitive nets and power nets. For the routing of noise nets, the router provides a net-crossing-free terminal assignment between sensitive nets and noise nets for the routing of channels. Efficient terminal assignment and extraction techniques for the router are also presented.
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M3 - Conference contribution
AN - SCOPUS:0025843022
SN - 0780300335
T3 - Conference Proceedings - IEEE SOUTHEASTCON
SP - 392
EP - 396
BT - Conference Proceedings - IEEE SOUTHEASTCON
PB - Publ by IEEE
T2 - IEEE Proceedings of the SOUTHEASTCON '91
Y2 - 8 April 1991 through 10 April 1991
ER -