Global routing techniques for an automatic mixed analog/digital IC layout compiler

研究成果: Conference contribution

1 引文 斯高帕斯(Scopus)

摘要

Global routing techniques for an automated analog/digital IC layout compiler are presented. The global router routes in a net-by-net, high-sensitivity-net-first order. Minimum trees are searched for the interconnection of sensitive nets and power nets. For the routing of noise nets, the router provides a net-crossing-free terminal assignment between sensitive nets and noise nets for the routing of channels. Efficient terminal assignment and extraction techniques for the router are also presented.

原文English
主出版物標題Conference Proceedings - IEEE SOUTHEASTCON
發行者Publ by IEEE
頁面392-396
頁數5
ISBN(列印)0780300335
出版狀態Published - 1991 一月 1
事件IEEE Proceedings of the SOUTHEASTCON '91 - Williamsburg, VA, USA
持續時間: 1991 四月 81991 四月 10

出版系列

名字Conference Proceedings - IEEE SOUTHEASTCON
1
ISSN(列印)0734-7502

Other

OtherIEEE Proceedings of the SOUTHEASTCON '91
城市Williamsburg, VA, USA
期間91-04-0891-04-10

    指紋

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

引用此

Lin, Z. M. (1991). Global routing techniques for an automatic mixed analog/digital IC layout compiler. 於 Conference Proceedings - IEEE SOUTHEASTCON (頁 392-396). (Conference Proceedings - IEEE SOUTHEASTCON; 卷 1). Publ by IEEE.