TY - JOUR
T1 - Bitmask-based code compression methods for balancing power consumption and code size for hard real-time embedded systems
AU - Chen, Po-Yueh
AU - Wu, Chao-Chin
AU - Jiang, Ying Jie
PY - 2012/5/1
Y1 - 2012/5/1
N2 - In recent years, code compression has been frequently investigated for embedded systems to reduce memory use and power consumption. Among various compression schemes, dictionary-based ones are applied for their good compression ratios and rapid decompression engines. Bitmask-based code compression, which was derived from the dictionary-based ones, has been proven to have a superior compression ratio and rapid decompression engine. In this paper, we adopt the bitmask-based scheme and replace some of its dictionary entries to achieve greatly reduced power consumption while maintaining a competitive compression ratio. For a cacheless architecture, we propose three basic styles of replacement, namely by-access-saving, by-frequency, and by-block. Another procedure, called by-alignment, is applied afterward to further improve power consumption. According to the experimental results, the by-block scheme with the by-alignment procedure achieves the best result. In the best case, an increase of 1.61% in compression ratio can result in a 43.75% reduction in power consumption ratio.
AB - In recent years, code compression has been frequently investigated for embedded systems to reduce memory use and power consumption. Among various compression schemes, dictionary-based ones are applied for their good compression ratios and rapid decompression engines. Bitmask-based code compression, which was derived from the dictionary-based ones, has been proven to have a superior compression ratio and rapid decompression engine. In this paper, we adopt the bitmask-based scheme and replace some of its dictionary entries to achieve greatly reduced power consumption while maintaining a competitive compression ratio. For a cacheless architecture, we propose three basic styles of replacement, namely by-access-saving, by-frequency, and by-block. Another procedure, called by-alignment, is applied afterward to further improve power consumption. According to the experimental results, the by-block scheme with the by-alignment procedure achieves the best result. In the best case, an increase of 1.61% in compression ratio can result in a 43.75% reduction in power consumption ratio.
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U2 - 10.1016/j.micpro.2011.12.008
DO - 10.1016/j.micpro.2011.12.008
M3 - Article
AN - SCOPUS:84862803121
VL - 36
SP - 267
EP - 279
JO - Microprocessors and Microsystems
JF - Microprocessors and Microsystems
SN - 0141-9331
IS - 3
ER -