A novel bottom-up fabrication process for controllable sub-100 nm magnetic multilayer devices

Ming Yuan Kao, J. Y. Ou, Lance Horng, Jong Ching Wu

研究成果: Article

1 引文 斯高帕斯(Scopus)

摘要

We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/Si02 stencil mask with very well undercutting profile of Si02 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.

原文English
頁(從 - 到)2734-2736
頁數3
期刊IEEE Transactions on Magnetics
44
發行號11 PART 2
DOIs
出版狀態Published - 2008 十一月 1

    指紋

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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