A new relaxed memory consistency model for shared-memory multiprocessors with parallel-multithreaded processing elements

Chao Chin Wu, Cheng Chen

研究成果: Article

2 引文 斯高帕斯(Scopus)

摘要

The release consistency model is the generally accepted hardware-centric relaxed memory consistency model because of its performance and implementation complexity. By extending the release consistency model, in this paper, we propose a hardware-centric memory consistency model particularly for shared-memory multiprocessor systems with parallel-multithreaded processing elements. The new model uses a new categorization for memory references and utilizes the feature of parallel multithreaded processors (PMPs). We further partition acquire and release references into three sub-categories: one for lock-unlock pairs, one for barrier synchronization, and the last for others. According to the semantic of each synchronization primitive, each sub-category has its own relaxed restrictions. On the other hand, the feature of a PMP is that it is capable of executing more than one thread at the same time, where all parallel threads share only one cache hierarchy. Under the new model, we can use dual write-caches to reduce write traffic and synchronization time. We have used five benchmarks in the SPLASH suite to evaluate the performance gain for the new model. According to the simulation results, the new model is superior to the release consistency model at best by about 11%.

原文English
頁(從 - 到)785-808
頁數24
期刊Journal of Information Science and Engineering
14
發行號4
出版狀態Published - 1998 十二月 1

All Science Journal Classification (ASJC) codes

  • Software
  • Human-Computer Interaction
  • Hardware and Architecture
  • Library and Information Sciences
  • Computational Theory and Mathematics

指紋 深入研究「A new relaxed memory consistency model for shared-memory multiprocessors with parallel-multithreaded processing elements」主題。共同形成了獨特的指紋。

  • 引用此