VLSI implementation of the motion estimator with two-dimensional data-reuse

Yeong Kang Lai; Yeong Lin Lai; Yuan Chen Liu; Liang Gee Chen

doi:10.1109/30.713173

VLSI implementation of the motion estimator with two-dimensional data-reuse

Yeong Kang Lai, Yeong Lin Lai, Yuan Chen Liu, Liang Gee Chen

Department of Mechatronic Engineering

Research output: Contribution to journal › Article › peer-review

5 Citations (Scopus)

Abstract

This paper describes the VLSI implementation with two-dimensional (2-D) data-reuse architecture for full-search block-matching algorithm. Based on a one-dimensional processing element (PE) array and two data-interlacing shift-register arrays, the proposed VLSI architecture can efficiently reuse data to decrease external memory accesses and save the pin counts. It also achieves 100% hardware utilization and a high throughput rate. In addition, the same chips can be cascaded for different block sizes, search ranges, and pixel rates.

Original language	English
Pages (from-to)	623-629
Number of pages	7
Journal	IEEE Transactions on Consumer Electronics
Volume	44
Issue number	3
DOIs	https://doi.org/10.1109/30.713173
Publication status	Published - 1998 Dec 1

All Science Journal Classification (ASJC) codes

Media Technology
Electrical and Electronic Engineering

Access to Document

10.1109/30.713173

Fingerprint Dive into the research topics of 'VLSI implementation of the motion estimator with two-dimensional data-reuse'. Together they form a unique fingerprint.

Cite this

@article{2d01541912604e528e5231671dc457a6,

title = "VLSI implementation of the motion estimator with two-dimensional data-reuse",

abstract = "This paper describes the VLSI implementation with two-dimensional (2-D) data-reuse architecture for full-search block-matching algorithm. Based on a one-dimensional processing element (PE) array and two data-interlacing shift-register arrays, the proposed VLSI architecture can efficiently reuse data to decrease external memory accesses and save the pin counts. It also achieves 100% hardware utilization and a high throughput rate. In addition, the same chips can be cascaded for different block sizes, search ranges, and pixel rates.",

author = "Lai, {Yeong Kang} and Lai, {Yeong Lin} and Liu, {Yuan Chen} and Chen, {Liang Gee}",

year = "1998",

month = dec,

day = "1",

doi = "10.1109/30.713173",

language = "English",

volume = "44",

pages = "623--629",

journal = "IEEE Transactions on Consumer Electronics",

issn = "0098-3063",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "3",

}

TY - JOUR

T1 - VLSI implementation of the motion estimator with two-dimensional data-reuse

AU - Lai, Yeong Kang

AU - Lai, Yeong Lin

AU - Liu, Yuan Chen

AU - Chen, Liang Gee

PY - 1998/12/1

Y1 - 1998/12/1

N2 - This paper describes the VLSI implementation with two-dimensional (2-D) data-reuse architecture for full-search block-matching algorithm. Based on a one-dimensional processing element (PE) array and two data-interlacing shift-register arrays, the proposed VLSI architecture can efficiently reuse data to decrease external memory accesses and save the pin counts. It also achieves 100% hardware utilization and a high throughput rate. In addition, the same chips can be cascaded for different block sizes, search ranges, and pixel rates.

AB - This paper describes the VLSI implementation with two-dimensional (2-D) data-reuse architecture for full-search block-matching algorithm. Based on a one-dimensional processing element (PE) array and two data-interlacing shift-register arrays, the proposed VLSI architecture can efficiently reuse data to decrease external memory accesses and save the pin counts. It also achieves 100% hardware utilization and a high throughput rate. In addition, the same chips can be cascaded for different block sizes, search ranges, and pixel rates.

UR - http://www.scopus.com/inward/record.url?scp=0032141487&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0032141487&partnerID=8YFLogxK

U2 - 10.1109/30.713173

DO - 10.1109/30.713173

M3 - Article

AN - SCOPUS:0032141487

VL - 44

SP - 623

EP - 629

JO - IEEE Transactions on Consumer Electronics

JF - IEEE Transactions on Consumer Electronics

SN - 0098-3063

IS - 3

ER -