Vector control technique and sleep-transistor allocation for supply-gating current spike reduction in power management

J. C. Tzeng; T. C. Huang

doi:10.1049/cp:20051551

Vector control technique and sleep-transistor allocation for supply-gating current spike reduction in power management

J. C. Tzeng, T. C. Huang

Department of Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Power-gating is an effective approach for reducing both dynamic and static power dissipation in power management and test scheduling. This paper formulates the power-gating spike problem, derives a reduced power dissipation model as heuristics, proposes a vector control technique for post-gating circuits, and develops a sleep-transistor allocation scheme for power-on/off current spikes reduction of pre-gating systems. From experimental results, a justified controlling vector can reduce the on/off peak power up to 55%. For a pre-gating system, more than 83% of the power-gating spike can be reduced. From our preliminary simulations using HSPICE so far, this heuristics has been proved to reduce the supply-gating current spike.

Original language	English
Title of host publication	IEE Mobility Conference 2005 - Second International Conference on Mobile Technology, Applications and Systems
Number of pages	1
Edition	496 CP
DOIs	https://doi.org/10.1049/cp:20051551
Publication status	Published - 2005 Dec 1
Event	IEE Mobility Conference 2005 - The Second International Conference on Mobile Technology, Applications and Systems - Guangzhou, China Duration: 2005 Nov 15 → 2005 Nov 17

Publication series

Name	IET Conference Publications
Number	496 CP

Other

Other	IEE Mobility Conference 2005 - The Second International Conference on Mobile Technology, Applications and Systems
Country	China
City	Guangzhou
Period	05-11-15 → 05-11-17

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1049/cp:20051551

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title = "Vector control technique and sleep-transistor allocation for supply-gating current spike reduction in power management",

abstract = "Power-gating is an effective approach for reducing both dynamic and static power dissipation in power management and test scheduling. This paper formulates the power-gating spike problem, derives a reduced power dissipation model as heuristics, proposes a vector control technique for post-gating circuits, and develops a sleep-transistor allocation scheme for power-on/off current spikes reduction of pre-gating systems. From experimental results, a justified controlling vector can reduce the on/off peak power up to 55%. For a pre-gating system, more than 83% of the power-gating spike can be reduced. From our preliminary simulations using HSPICE so far, this heuristics has been proved to reduce the supply-gating current spike.",

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Tzeng, JC & Huang, TC 2005, Vector control technique and sleep-transistor allocation for supply-gating current spike reduction in power management. in IEE Mobility Conference 2005 - Second International Conference on Mobile Technology, Applications and Systems. 496 CP edn, IET Conference Publications, no. 496 CP, IEE Mobility Conference 2005 - The Second International Conference on Mobile Technology, Applications and Systems, Guangzhou, China, 05-11-15. https://doi.org/10.1049/cp:20051551

Vector control technique and sleep-transistor allocation for supply-gating current spike reduction in power management. / Tzeng, J. C.; Huang, T. C.

IEE Mobility Conference 2005 - Second International Conference on Mobile Technology, Applications and Systems. 496 CP. ed. 2005. (IET Conference Publications; No. 496 CP).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - Power-gating is an effective approach for reducing both dynamic and static power dissipation in power management and test scheduling. This paper formulates the power-gating spike problem, derives a reduced power dissipation model as heuristics, proposes a vector control technique for post-gating circuits, and develops a sleep-transistor allocation scheme for power-on/off current spikes reduction of pre-gating systems. From experimental results, a justified controlling vector can reduce the on/off peak power up to 55%. For a pre-gating system, more than 83% of the power-gating spike can be reduced. From our preliminary simulations using HSPICE so far, this heuristics has been proved to reduce the supply-gating current spike.

AB - Power-gating is an effective approach for reducing both dynamic and static power dissipation in power management and test scheduling. This paper formulates the power-gating spike problem, derives a reduced power dissipation model as heuristics, proposes a vector control technique for post-gating circuits, and develops a sleep-transistor allocation scheme for power-on/off current spikes reduction of pre-gating systems. From experimental results, a justified controlling vector can reduce the on/off peak power up to 55%. For a pre-gating system, more than 83% of the power-gating spike can be reduced. From our preliminary simulations using HSPICE so far, this heuristics has been proved to reduce the supply-gating current spike.

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