Vector control technique and sleep-transistor allocation for supply-gating current spike reduction in power management

Power-gating is an effective approach for reducing both dynamic and static power dissipation in power management and test scheduling. This paper formulates the power-gating spike problem, derives a reduced power dissipation model as heuristics, proposes a vector control technique for post-gating circuits, and develops a sleep-transistor allocation scheme for power-on/off current spikes reduction of pre-gating systems. From experimental results, a justified controlling vector can reduce the on/off peak power up to 55% For a pre-gating system, more than 83% of the power-gating spike can be reduced. From our preliminary simulations using HSPICE so far, this heuristics has been proved to reduce the supply-gating current spike.