The segmented-matrix algorithm for Haar discrete wavelet transform

Po Yueh Chen, En Chi Liao, Chung Wei Liang

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

Discrete wavelet transform (DWT) is an efficient tool for multi-resolution decomposition of images. It has been shown to be very promising due to its high compression ratio and self-similar data structure. Conventionally a 2-D DWT is accomplished by performing two 1-D operations: one along the rows and the other along the columns of an image. Without executing ordered 1-D transforms, we develop a new algorithm to compute a 2-D Haar DWT, the simplest DWT. Two merits of this algorithm are compactness and quickness. The algorithm is implemented with a compact, regular VLSI architecture whose system throughput can be conveniently improved by appropriate parallel/pipeline methods.

Original languageEnglish
Pages (from-to)1273-1282
Number of pages10
JournalJournal of Information Science and Engineering
Volume24
Issue number4
Publication statusPublished - 2008 Jul 1

Fingerprint

Discrete wavelet transforms
Data structures
Pipelines
Throughput
Decomposition

All Science Journal Classification (ASJC) codes

  • Software
  • Human-Computer Interaction
  • Hardware and Architecture
  • Library and Information Sciences
  • Computational Theory and Mathematics

Cite this

@article{a8bed66da3e74bcaa14a28123d0f4f2a,
title = "The segmented-matrix algorithm for Haar discrete wavelet transform",
abstract = "Discrete wavelet transform (DWT) is an efficient tool for multi-resolution decomposition of images. It has been shown to be very promising due to its high compression ratio and self-similar data structure. Conventionally a 2-D DWT is accomplished by performing two 1-D operations: one along the rows and the other along the columns of an image. Without executing ordered 1-D transforms, we develop a new algorithm to compute a 2-D Haar DWT, the simplest DWT. Two merits of this algorithm are compactness and quickness. The algorithm is implemented with a compact, regular VLSI architecture whose system throughput can be conveniently improved by appropriate parallel/pipeline methods.",
author = "Chen, {Po Yueh} and Liao, {En Chi} and Liang, {Chung Wei}",
year = "2008",
month = "7",
day = "1",
language = "English",
volume = "24",
pages = "1273--1282",
journal = "Journal of Information Science and Engineering",
issn = "1016-2364",
publisher = "Institute of Information Science",
number = "4",

}

The segmented-matrix algorithm for Haar discrete wavelet transform. / Chen, Po Yueh; Liao, En Chi; Liang, Chung Wei.

In: Journal of Information Science and Engineering, Vol. 24, No. 4, 01.07.2008, p. 1273-1282.

Research output: Contribution to journalArticle

TY - JOUR

T1 - The segmented-matrix algorithm for Haar discrete wavelet transform

AU - Chen, Po Yueh

AU - Liao, En Chi

AU - Liang, Chung Wei

PY - 2008/7/1

Y1 - 2008/7/1

N2 - Discrete wavelet transform (DWT) is an efficient tool for multi-resolution decomposition of images. It has been shown to be very promising due to its high compression ratio and self-similar data structure. Conventionally a 2-D DWT is accomplished by performing two 1-D operations: one along the rows and the other along the columns of an image. Without executing ordered 1-D transforms, we develop a new algorithm to compute a 2-D Haar DWT, the simplest DWT. Two merits of this algorithm are compactness and quickness. The algorithm is implemented with a compact, regular VLSI architecture whose system throughput can be conveniently improved by appropriate parallel/pipeline methods.

AB - Discrete wavelet transform (DWT) is an efficient tool for multi-resolution decomposition of images. It has been shown to be very promising due to its high compression ratio and self-similar data structure. Conventionally a 2-D DWT is accomplished by performing two 1-D operations: one along the rows and the other along the columns of an image. Without executing ordered 1-D transforms, we develop a new algorithm to compute a 2-D Haar DWT, the simplest DWT. Two merits of this algorithm are compactness and quickness. The algorithm is implemented with a compact, regular VLSI architecture whose system throughput can be conveniently improved by appropriate parallel/pipeline methods.

UR - http://www.scopus.com/inward/record.url?scp=48849097597&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=48849097597&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:48849097597

VL - 24

SP - 1273

EP - 1282

JO - Journal of Information Science and Engineering

JF - Journal of Information Science and Engineering

SN - 1016-2364

IS - 4

ER -