Abstract
In this paper, we present a new architecture of Chinese abacus adder. As high radix of adder may reduce the number of carry propagation, the proposed Chinese abacus adder may achieve high-speed operation. The simulation results of our work are compared with CLA (Carry Look-ahead) adder. The delay of the 8-bit abacus adders are 22%, 17%, and 14% less than those of CLA adders for 0.35μm, 0.25μm, and 0.18μm technologies, respectively. The power consumption of the abacus adders are 30%, 34%, and 60% less than those of CLA adders for 0.35μm, 0.25μm, and 0.18μm technologies, respectively. The use of Chinese abacus approach results a competitive technique with respect to conventional fast adder.
| Original language | English |
|---|---|
| Title of host publication | 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 |
| Number of pages | 1 |
| DOIs | |
| Publication status | Published - 2006 Nov 21 |
| Event | 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 - Singapore, Singapore Duration: 2006 May 17 → 2006 May 20 |
Publication series
| Name | Proceedings of The International Symposium on Multiple-Valued Logic |
|---|---|
| ISSN (Print) | 0195-623X |
Other
| Other | 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 |
|---|---|
| Country | Singapore |
| City | Singapore |
| Period | 06-05-17 → 06-05-20 |
All Science Journal Classification (ASJC) codes
- Computer Science(all)
- Mathematics(all)
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Cite this
Yi, S. C., Lee, K. T., Chen, J. J., Lin, C. H., Wang, C. C., Hsieh, C. F., & Lu, C. Y. (2006). The new architecture of radix-4 Chinese abacus adder. In 36th International Symposium on Multiple-Valued Logic, 2006. ISMVL 2006 [1623964] (Proceedings of The International Symposium on Multiple-Valued Logic). https://doi.org/10.1109/ISMVL.2006.41