Storage optimization by replacing some flip-flops with latches

Tsung-Yi Wu, Youn Long Lin

Research output: Contribution to conferencePaper

13 Citations (Scopus)

Abstract

Conventionally, when a synchronous sequential circuit is synthesized, storage units are implemented in either edge-triggered flip-flops or level-sensitive latches, but not both, depending on the clocking scheme (one- or two-phase) used. We propose that, in the former case, some of the flip-flops can be replaced with latches. Since a latch is generally smaller, faster and less power-consuming than a flip-flop, this replacement leads to improvements in circuit area, performance and power consumption. Whether a flip-flop can be replaced with a latch depends on not only its structural context but also its temporal behavior. In this paper, we first present conditions under which a straightforward replacement can be made; then, we propose two retiming-based transformations that increase the number of replaceable flip-flops. We have implemented the proposed idea in a software called FF2Latch. Experimental results on a set of control-dominated circuits from the high-level synthesis benchmark set [1] show that a large number of the flip-flops can be replaced with latches. Up to 22% reduction in the circuit area and up to 73% reduction in the power consumption have been achieved.

Original languageEnglish
Pages296-301
Number of pages6
Publication statusPublished - 1996 Jan 1
EventProceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition - Geneva, Switz
Duration: 1996 Sep 161996 Sep 20

Other

OtherProceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition
CityGeneva, Switz
Period96-09-1696-09-20

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Flip flop circuits
Networks (circuits)
Electric power utilization
Sequential circuits

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering

Cite this

Wu, T-Y., & Lin, Y. L. (1996). Storage optimization by replacing some flip-flops with latches. 296-301. Paper presented at Proceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Switz, .
Wu, Tsung-Yi ; Lin, Youn Long. / Storage optimization by replacing some flip-flops with latches. Paper presented at Proceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Switz, .6 p.
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Wu, T-Y & Lin, YL 1996, 'Storage optimization by replacing some flip-flops with latches', Paper presented at Proceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Switz, 96-09-16 - 96-09-20 pp. 296-301.

Storage optimization by replacing some flip-flops with latches. / Wu, Tsung-Yi; Lin, Youn Long.

1996. 296-301 Paper presented at Proceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Switz, .

Research output: Contribution to conferencePaper

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N2 - Conventionally, when a synchronous sequential circuit is synthesized, storage units are implemented in either edge-triggered flip-flops or level-sensitive latches, but not both, depending on the clocking scheme (one- or two-phase) used. We propose that, in the former case, some of the flip-flops can be replaced with latches. Since a latch is generally smaller, faster and less power-consuming than a flip-flop, this replacement leads to improvements in circuit area, performance and power consumption. Whether a flip-flop can be replaced with a latch depends on not only its structural context but also its temporal behavior. In this paper, we first present conditions under which a straightforward replacement can be made; then, we propose two retiming-based transformations that increase the number of replaceable flip-flops. We have implemented the proposed idea in a software called FF2Latch. Experimental results on a set of control-dominated circuits from the high-level synthesis benchmark set [1] show that a large number of the flip-flops can be replaced with latches. Up to 22% reduction in the circuit area and up to 73% reduction in the power consumption have been achieved.

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Wu T-Y, Lin YL. Storage optimization by replacing some flip-flops with latches. 1996. Paper presented at Proceedings of the 1996 European Design Automation Conference with EURO-VHDL'96 and Exhibition, Geneva, Switz, .