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Source-end layouts on ESD/LU reliabilities in an HV 0.25 um 60 v nLDMOS
Shen Li Chen, Min Hua Lee, Tzung Shian Wu, Yi Sheng Lai, Chun Ju Lin, Hsun-Hsiang Chen
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
5
Citations
(Scopus)