Source-end layouts on ESD/LU reliabilities in an HV 0.25 um 60 v nLDMOS

Shen Li Chen, Min Hua Lee, Tzung Shian Wu, Yi Sheng Lai, Chun Ju Lin, Hsun-Hsiang Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Fingerprint Dive into the research topics of 'Source-end layouts on ESD/LU reliabilities in an HV 0.25 um 60 v nLDMOS'. Together they form a unique fingerprint.

Engineering & Materials Science