Research is underway to explore the feasibility of implementing complete RF subsystems in standard mainstream CMOS processes without a need for any off-chip components. However, there are challenges to overcome. When RF signals are brought on-to or off-of a system-on-chip (SoC) device special connectors are needed. Also, use of RF communication requires establishment of a frequency reference and also raises noise management issues. To overcome such, the vision was that a node would contain an RF subsystem, a baseband microprocessor subsystem and some sensor subsystem formed in a single chip. The microprocessor, named micronode, consists of one low cost CMOS chip. An important aspect of the micronode is the incorporation of antennas onchip. The option of on-chip antenna implementation avoids high frequency wired I/O, avoids losses associated with off-chip RF connectors and eliminates losses associated with antenna-to-chip transmission lines. Meanwhile, a concern for on-chip antennas is unwanted signal and noise coupling. The noise from digital circuits can couple to RF circuits through the receiving antenna. This concern is being addressed with the use of dual conversion with an intermediate frequency of 3 GHz, separates the VCO frequency and that for the transmitted signal by 3 GHz. The large separation greatly reduces any VCO injection pulling problem.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering