Abstract
In a digital circuit system, IR drop effect can be alleviated by reducing the peak current of the system. Clock skew scheduling is a popular technique for peak current reduction. In this paper, we propose two algorithms that apply a Multiple Threshold CMOS (MTCMOS) technique rather than clock skew scheduling to do peak current reduction. MTCMOS techniques are feasible to reduce peak current because different threshold cells have different cell delays and current waveforms. Experimental results show that our technique can reduce the peak current up to 47.7%. Our proposed technique can reduce not only peak current but also leakage current. Moreover, a peak current reduction algorithm using a clock skew technique or an opposite-phase clock scheme can employ our proposed technique to further reduce the peak current of a circuit.
Original language | English |
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Title of host publication | Proceedings of the 2nd Asia Symposium on Quality Electronic Design, ASQED 2010 |
Pages | 255-259 |
Number of pages | 5 |
DOIs | |
Publication status | Published - 2010 Sep 17 |
Event | 2nd Asia Symposium on Quality Electronic Design, ASQED 2010 - Penang, Malaysia Duration: 2010 Aug 3 → 2010 Aug 4 |
Other
Other | 2nd Asia Symposium on Quality Electronic Design, ASQED 2010 |
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Country | Malaysia |
City | Penang |
Period | 10-08-03 → 10-08-04 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
- Safety, Risk, Reliability and Quality