Look-ahead memory consistency model

Chao Chin Wu, Der Lin Pean, Cheng Chen

Research output: Contribution to conferencePaperpeer-review

1 Citation (Scopus)


In this paper, we propose a hardware-centric look-ahead memory consistency model that makes the data consistent according to the special ordering requirement of memory accesses for critical sections. The novel model imposes fewer restrictions on event ordering than previously proposed models thus offering the potential of higher performance. The architecture has the following features: (1) blocking and waking up processes by hardware, (2) allowing instructions to be executed out-of-order, (3) until having acquired the lock can the processor allow the requests for accessing the protected data to be evicted to the memory subsystem. The advantages of the look-ahead model include: (1) more program segments are allowed parallel execution, (2) locks can be released earlier, resulting in reduced waiting times for acquiring lock, and (3) less network traffic because more write requests are merged by using two write caches.

Original languageEnglish
Number of pages7
Publication statusPublished - 1998 Dec 1
EventProceedings of the 1998 International Conference on Parallel and Distributed Systems, ICPADS - Tainan, China
Duration: 1998 Dec 141998 Dec 16


OtherProceedings of the 1998 International Conference on Parallel and Distributed Systems, ICPADS
CityTainan, China

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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