Level selection based pre-emphasis for PAM transmitter

Zhi-Ming Lin; K. Y. Chang

doi:10.1049/el:20064099

Level selection based pre-emphasis for PAM transmitter

Zhi-Ming Lin, K. Y. Chang

Department of Computer Science and Information Engineering

Research output: Contribution to journal › Article

2 Citations (Scopus)

Abstract

A novel pre-emphasis for a multi-level PAM transmitter is presented. Overshooting and power consumption are reduced through a level selection approach. The test chip fabricated using a TSMC 0.18 μm CMOS process shows 142 mW power dissipation with 500 Mbit/s symbol rate and 1 Gbit/s equivalent data rate.

Original language	English
Pages (from-to)	399-400
Number of pages	2
Journal	Electronics Letters
Volume	42
Issue number	7
DOIs	https://doi.org/10.1049/el:20064099
Publication status	Published - 2006 Mar 30

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1049/el:20064099

Fingerprint Dive into the research topics of 'Level selection based pre-emphasis for PAM transmitter'. Together they form a unique fingerprint.

Cite this

@article{79e0d1f1d1e6498cb2bec08d5da63eef,

title = "Level selection based pre-emphasis for PAM transmitter",

abstract = "A novel pre-emphasis for a multi-level PAM transmitter is presented. Overshooting and power consumption are reduced through a level selection approach. The test chip fabricated using a TSMC 0.18 μm CMOS process shows 142 mW power dissipation with 500 Mbit/s symbol rate and 1 Gbit/s equivalent data rate.",

author = "Zhi-Ming Lin and Chang, {K. Y.}",

year = "2006",

month = mar,

day = "30",

doi = "10.1049/el:20064099",

language = "English",

volume = "42",

pages = "399--400",

journal = "Electronics Letters",

issn = "0013-5194",

publisher = "Institution of Engineering and Technology",

number = "7",

}

TY - JOUR

T1 - Level selection based pre-emphasis for PAM transmitter

AU - Lin, Zhi-Ming

AU - Chang, K. Y.

PY - 2006/3/30

Y1 - 2006/3/30

N2 - A novel pre-emphasis for a multi-level PAM transmitter is presented. Overshooting and power consumption are reduced through a level selection approach. The test chip fabricated using a TSMC 0.18 μm CMOS process shows 142 mW power dissipation with 500 Mbit/s symbol rate and 1 Gbit/s equivalent data rate.

AB - A novel pre-emphasis for a multi-level PAM transmitter is presented. Overshooting and power consumption are reduced through a level selection approach. The test chip fabricated using a TSMC 0.18 μm CMOS process shows 142 mW power dissipation with 500 Mbit/s symbol rate and 1 Gbit/s equivalent data rate.

UR - http://www.scopus.com/inward/record.url?scp=33750209389&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33750209389&partnerID=8YFLogxK

U2 - 10.1049/el:20064099

DO - 10.1049/el:20064099

M3 - Article

AN - SCOPUS:33750209389

VL - 42

SP - 399

EP - 400

JO - Electronics Letters

JF - Electronics Letters

SN - 0013-5194

IS - 7

ER -