Abstract
A novel pre-emphasis for a multi-level PAM transmitter is presented. Overshooting and power consumption are reduced through a level selection approach. The test chip fabricated using a TSMC 0.18 μm CMOS process shows 142 mW power dissipation with 500 Mbit/s symbol rate and 1 Gbit/s equivalent data rate.
Original language | English |
---|---|
Pages (from-to) | 399-400 |
Number of pages | 2 |
Journal | Electronics Letters |
Volume | 42 |
Issue number | 7 |
DOIs | |
Publication status | Published - 2006 Mar 30 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering