IR drop reduction via a flip-flop resynthesis technique

Jiun Kuan Wu, Tsung Yi Wu, Liang Ying Lu, Kuang Yao Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

Clock skew scheduling for peak current reduction is a conventional technique for solving IR-drop problem in physical design stage. In this paper, we propose two kinds of long delay flip-flops and a heuristic algorithm that is used to resynthesize flip-flops of a circuit. Because the switching times of flip-flops in the resynthesized circuit are staggered, the IR drop effect can be reduced. Unlike clock skew scheduling, our technique not only can be used in physical design stage but also in logic design stage. The other advantages of our technique over the clock skew optimization technique are that our technique has less area overhead and has more opportunities to find a better result.

Original languageEnglish
Title of host publicationProceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008
Pages78-83
Number of pages6
DOIs
Publication statusPublished - 2008 Aug 25
Event9th International Symposium on Quality Electronic Design, ISQED 2008 - San Jose, CA, United States
Duration: 2008 Mar 172008 Mar 19

Publication series

NameProceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008

Other

Other9th International Symposium on Quality Electronic Design, ISQED 2008
CountryUnited States
CitySan Jose, CA
Period08-03-1708-03-19

Fingerprint

Flip flop circuits
Clocks
Scheduling
Logic design
Networks (circuits)
Heuristic algorithms

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Wu, J. K., Wu, T. Y., Lu, L. Y., & Chen, K. Y. (2008). IR drop reduction via a flip-flop resynthesis technique. In Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008 (pp. 78-83). [4479702] (Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008). https://doi.org/10.1109/ISQED.2008.4479702
Wu, Jiun Kuan ; Wu, Tsung Yi ; Lu, Liang Ying ; Chen, Kuang Yao. / IR drop reduction via a flip-flop resynthesis technique. Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008. 2008. pp. 78-83 (Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008).
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Wu, JK, Wu, TY, Lu, LY & Chen, KY 2008, IR drop reduction via a flip-flop resynthesis technique. in Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008., 4479702, Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008, pp. 78-83, 9th International Symposium on Quality Electronic Design, ISQED 2008, San Jose, CA, United States, 08-03-17. https://doi.org/10.1109/ISQED.2008.4479702

IR drop reduction via a flip-flop resynthesis technique. / Wu, Jiun Kuan; Wu, Tsung Yi; Lu, Liang Ying; Chen, Kuang Yao.

Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008. 2008. p. 78-83 4479702 (Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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AB - Clock skew scheduling for peak current reduction is a conventional technique for solving IR-drop problem in physical design stage. In this paper, we propose two kinds of long delay flip-flops and a heuristic algorithm that is used to resynthesize flip-flops of a circuit. Because the switching times of flip-flops in the resynthesized circuit are staggered, the IR drop effect can be reduced. Unlike clock skew scheduling, our technique not only can be used in physical design stage but also in logic design stage. The other advantages of our technique over the clock skew optimization technique are that our technique has less area overhead and has more opportunities to find a better result.

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Wu JK, Wu TY, Lu LY, Chen KY. IR drop reduction via a flip-flop resynthesis technique. In Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008. 2008. p. 78-83. 4479702. (Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008). https://doi.org/10.1109/ISQED.2008.4479702