@inproceedings{2ad8a88ec1d142da88c787c3b0fe0a16,
title = "Implementation of an efficient DWT using a FPGA on a real-time platform",
abstract = "In this paper, we propose a novel, efficient VLSI architecture for the implementation of one-dimension, lifting-based discrete wavelet transform (DWT). Both of the folded and the pipelined schemes are applied by the proposed architecture; the former scheme supports higher hardware utilization and the latter scheme speeds up the clock rate of the DWT. The architecture is coded in Verilog HDL, implemented in a FPGA, and verified by the platform of Quartus-II which is a realtime platform comprising a CMOS image sensor, a FPGA and a TFT-LCD panel.",
author = "Hsieh, {Chin Fa} and Tsai, {Tsung Han} and Lai, {Chih Hung} and Yi, {Shu Chung} and Yen, {Mao Hsu}",
year = "2007",
month = jan,
day = "1",
doi = "10.1109/ICICIC.2007.346",
language = "English",
isbn = "0769528821",
series = "Second International Conference on Innovative Computing, Information and Control, ICICIC 2007",
publisher = "IEEE Computer Society",
booktitle = "Second International Conference on Innovative Computing, Information and Control, ICICIC 2007",
address = "United States",
note = "2nd International Conference on Innovative Computing, Information and Control, ICICIC 2007 ; Conference date: 05-09-2007 Through 07-09-2007",
}