Abstract
In this reported work, a built-in self-routing scheme is developed for exploring the through-silicon via (TSV) redundancy to the extremes. A built-in self-router consists of a built-in self-tester for testing the TSVs, and a priority switching network for selecting from M TSVs to N inter-chip interconnects. A switching cell is developed to sequentially construct the priority switching network for area reduction and synthesis regularity. Although a long latency is needed for the encoding network, the best performance during inter-chip communication can be achieved due to only one switch per tier in normal operations. In a multiple fault model with no more than M-N defected TSVs, the repair rate can be always 100.
Original language | English |
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Pages (from-to) | 480-482 |
Number of pages | 3 |
Journal | Electronics Letters |
Volume | 48 |
Issue number | 9 |
DOIs | |
Publication status | Published - 2012 Apr 26 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering