Enhancing boosting with semantic register in a superscalar processor

Feipei Lai, Meng-Chou Chang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Summary form only given, as follows. IAS-S Supports boosting with 'seminar register' and boosting boundary register to remove the dependences caused by conditional branches. In IAS-S, there is no dedicated shadow register file, and multiple levels of boosting is supported without multiple copies of register files. Any general-purpose register in IAS-S can be regarded as a sequential register or a shadow register flexibly. Furthermore, a multiway jump mechanism is combined with boosting to reduce the penalty due to frequent control transfers.

Original languageEnglish
Title of host publicationConference Proceedings - Annual Symposium on Computer Architecture
PublisherPubl by IEEE
Number of pages1
ISBN (Print)0897915097
Publication statusPublished - 1992 May 1
Event19th International Symposium on Computer Architecture - Gold Coast, Aust
Duration: 1992 May 191992 May 21

Other

Other19th International Symposium on Computer Architecture
CityGold Coast, Aust
Period92-05-1992-05-21

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All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Lai, F., & Chang, M-C. (1992). Enhancing boosting with semantic register in a superscalar processor. In Conference Proceedings - Annual Symposium on Computer Architecture Publ by IEEE.