Abstract
IAS-S Supports boosting with 'semantic register' and boosting boundary register to remove the dependences caused by conditional branches. In IAS-S, there is no dedicated shadow register file, and multiple levels of boosting is supported without multiple copies of register files. Any general-purpose register in IAS-S can be regarded as a sequential register or a shadow register flexibly. Furthermore, multi-way jump mechanism is combined with boosting to reduce the penalty due to frequent control transfers.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the Ninth Annual International Symposium on Computer Architecture |
| Publisher | Publ by ACM |
| Number of pages | 1 |
| ISBN (Print) | 0897915097 |
| Publication status | Published - 1993 Dec 1 |
| Event | Proceedings of the 19th Annual International Symposium on Compu- ter Architecture - Gold Coast, Aust Duration: 1992 May 19 → 1992 May 21 |
Other
| Other | Proceedings of the 19th Annual International Symposium on Compu- ter Architecture |
|---|---|
| City | Gold Coast, Aust |
| Period | 92-05-19 → 92-05-21 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
Cite this
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Enhancing boosting with semantic register in a superscalar processor. / Lai, Feipei; Chang, Meng-Chou.
Proceedings of the Ninth Annual International Symposium on Computer Architecture. Publ by ACM, 1993.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - Enhancing boosting with semantic register in a superscalar processor
AU - Lai, Feipei
AU - Chang, Meng-Chou
PY - 1993/12/1
Y1 - 1993/12/1
N2 - IAS-S Supports boosting with 'semantic register' and boosting boundary register to remove the dependences caused by conditional branches. In IAS-S, there is no dedicated shadow register file, and multiple levels of boosting is supported without multiple copies of register files. Any general-purpose register in IAS-S can be regarded as a sequential register or a shadow register flexibly. Furthermore, multi-way jump mechanism is combined with boosting to reduce the penalty due to frequent control transfers.
AB - IAS-S Supports boosting with 'semantic register' and boosting boundary register to remove the dependences caused by conditional branches. In IAS-S, there is no dedicated shadow register file, and multiple levels of boosting is supported without multiple copies of register files. Any general-purpose register in IAS-S can be regarded as a sequential register or a shadow register flexibly. Furthermore, multi-way jump mechanism is combined with boosting to reduce the penalty due to frequent control transfers.
UR - http://www.scopus.com/inward/record.url?scp=0027837795&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0027837795&partnerID=8YFLogxK
M3 - Conference contribution
SN - 0897915097
BT - Proceedings of the Ninth Annual International Symposium on Computer Architecture
PB - Publ by ACM
ER -