TY - JOUR
T1 - Efficient method for the decomposition and resynthesis of speed-independent circuits
AU - Chen, Ren-Der
AU - Jou, Jer Min
PY - 1999/1/1
Y1 - 1999/1/1
N2 - This paper presents a time and area efficient method for the decomposition and resynthesis of speed-independent circuits from the signal transition graph (STG) specification. Our method first investigates the hazard-free decomposition of all high-fanin gates without adding any signals to the original specification. For those gates that can not be hazard-freely decomposed, we propose new signal-adding methods for resynthesis. Our decomposition and resynthesis techniques have been fully automated and applied to several asynchronous benchmarks. Compared with previous work, our method lowers the run time by 1-2 orders to magnitude, and the implementation area is also reduced.
AB - This paper presents a time and area efficient method for the decomposition and resynthesis of speed-independent circuits from the signal transition graph (STG) specification. Our method first investigates the hazard-free decomposition of all high-fanin gates without adding any signals to the original specification. For those gates that can not be hazard-freely decomposed, we propose new signal-adding methods for resynthesis. Our decomposition and resynthesis techniques have been fully automated and applied to several asynchronous benchmarks. Compared with previous work, our method lowers the run time by 1-2 orders to magnitude, and the implementation area is also reduced.
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M3 - Article
AN - SCOPUS:0032599263
SP - 62
EP - 65
JO - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
JF - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
SN - 1524-766X
ER -