This paper presents the design of a two-phase adiabatic CAM, which achieves low-power dissipation by employing adiabatic operation and two-step data matching. The proposed adiabatic CAM can recycle the charge on match lines and keep the voltage drop between the power clocks and the output nodes close to zero during the charging/discharging process, leading to lower power dissipation. Also, the match-line in each CAM word is partitioned into two segments, and the second segment is selectively charged/discharged according to the match result of the first segment. If the match result of the first word segment is mismatch, the charging/discharging of the second segment of the match-line will be eliminated, further reducing the power dissipation. Simulation results show that the proposed two-phase adiabatic CAM with 64 words×144 bits can achieve a power reduction of 16.9% compared to the traditional single-phase adiabatic CAM at an operating frequency of 500 MHz.