Design of a two-phase adiabatic content-addressable memory

Meng Chou Chang, Yen Ting Kuo

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents the design of a two-phase adiabatic CAM, which achieves low-power dissipation by employing adiabatic operation and two-step data matching. The proposed adiabatic CAM can recycle the charge on match lines and keep the voltage drop between the power clocks and the output nodes close to zero during the charging/discharging process, leading to lower power dissipation. Also, the match-line in each CAM word is partitioned into two segments, and the second segment is selectively charged/discharged according to the match result of the first segment. If the match result of the first word segment is mismatch, the charging/discharging of the second segment of the match-line will be eliminated, further reducing the power dissipation. Simulation results show that the proposed two-phase adiabatic CAM with 64 words×144 bits can achieve a power reduction of 16.9% compared to the traditional single-phase adiabatic CAM at an operating frequency of 500 MHz.

Original languageEnglish
Title of host publicationCommunication Systems and Information Technology - Selected Papers from the 2011 International Conference on Electric and Electronics, EEIC 2011
Pages577-583
Number of pages7
EditionVOL. 4
DOIs
Publication statusPublished - 2011 Dec 1
Event2011 International Conference on Electric and Electronics, EEIC 2011 - Nanchang, China
Duration: 2011 Jun 202011 Jun 22

Publication series

NameLecture Notes in Electrical Engineering
NumberVOL. 4
Volume100 LNEE
ISSN (Print)1876-1100
ISSN (Electronic)1876-1119

Other

Other2011 International Conference on Electric and Electronics, EEIC 2011
CountryChina
CityNanchang
Period11-06-2011-06-22

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All Science Journal Classification (ASJC) codes

  • Industrial and Manufacturing Engineering

Cite this

Chang, M. C., & Kuo, Y. T. (2011). Design of a two-phase adiabatic content-addressable memory. In Communication Systems and Information Technology - Selected Papers from the 2011 International Conference on Electric and Electronics, EEIC 2011 (VOL. 4 ed., pp. 577-583). (Lecture Notes in Electrical Engineering; Vol. 100 LNEE, No. VOL. 4). https://doi.org/10.1007/978-3-642-21762-3_75