Design of a bus driver for the physical layer of the flexray communication in a X-by-Wire vehicle electronic system

Shi Hao Zheng, Xin Rong Wang, Su Hsien Liao, Zhi Ming Lin

Research output: Contribution to journalArticle

Abstract

The major work of this paper is to design a Bus Driver for the physical layer of the FlexRay communication in an X-by-Wire vehicle electronic system. First, we design the digital state machine according to the FlexRay specifications [1, 2], and implement the external inpul/output signals and the internal signals that connect among each sub-circuit block. Second, we design a transmitter that can provide the capability of differentially transmitting binary data stream. Third, we design a receiver that not only can receive binary data stream, but also can filter noise and distinguish signal levels. Finally, we test the designed circuit. The testing results confirm the functionality of the designed Bus Driver. The design is based on a TSMC 0.35 u,m 2P4M mixed-signal CMOS process. For 10 MBit/s data rate, ±1.2 V transmitting voltages, and 45 Q bus equivalent resistance, the load and the transceiver dissipate 32 raW and 204 mW power, respectively.

Original languageEnglish
Pages (from-to)171-182
Number of pages12
JournalJournal of Technology
Volume30
Issue number3
Publication statusPublished - 2015 Jan 1

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Bus drivers
Wire
Communication
Networks (circuits)
Transceivers
Transmitters
Specifications
Testing
Electric potential

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

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abstract = "The major work of this paper is to design a Bus Driver for the physical layer of the FlexRay communication in an X-by-Wire vehicle electronic system. First, we design the digital state machine according to the FlexRay specifications [1, 2], and implement the external inpul/output signals and the internal signals that connect among each sub-circuit block. Second, we design a transmitter that can provide the capability of differentially transmitting binary data stream. Third, we design a receiver that not only can receive binary data stream, but also can filter noise and distinguish signal levels. Finally, we test the designed circuit. The testing results confirm the functionality of the designed Bus Driver. The design is based on a TSMC 0.35 u,m 2P4M mixed-signal CMOS process. For 10 MBit/s data rate, ±1.2 V transmitting voltages, and 45 Q bus equivalent resistance, the load and the transceiver dissipate 32 raW and 204 mW power, respectively.",
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Design of a bus driver for the physical layer of the flexray communication in a X-by-Wire vehicle electronic system. / Zheng, Shi Hao; Wang, Xin Rong; Liao, Su Hsien; Lin, Zhi Ming.

In: Journal of Technology, Vol. 30, No. 3, 01.01.2015, p. 171-182.

Research output: Contribution to journalArticle

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