Combined use of rising and falling edge triggered clocks for peak current reduction in IP-based SoC designs

Tsung-Yi Wu, Tzi Wei Kao, Shi Yi Huang, Tai Lun Li, How Rern Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

In a typical synchronous SoC design, a huge peak current often occurs near the time of an active clock edge because of aggregate switching of a large number of transistors. The number of aggregate switching transistors can be lessened if the SoC design can use a clock scheme of mixed rising and falling triggering edges rather than one of pure rising (falling) triggering edges. In this paper, we propose a clock-triggering-edge assignment technique and algorithms that can assign either a rising triggering edge or a falling triggering edge to each clock of each IP core or block of a given IP-based SoC design. The goal of the algorithms is to reduce the peak current of the design. Experimental results show that our algorithms can reduce peak currents up to 56.3%.

Original languageEnglish
Title of host publication2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010
Pages444-449
Number of pages6
DOIs
Publication statusPublished - 2010 Apr 28
Event2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010 - Taipei, Taiwan
Duration: 2010 Jan 182010 Jan 21

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010
CountryTaiwan
CityTaipei
Period10-01-1810-01-21

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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    Wu, T-Y., Kao, T. W., Huang, S. Y., Li, T. L., & Lin, H. R. (2010). Combined use of rising and falling edge triggered clocks for peak current reduction in IP-based SoC designs. In 2010 15th Asia and South Pacific Design Automation Conference, ASP-DAC 2010 (pp. 444-449). [5419842] (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2010.5419842