CMOS driver for heavy-load flat-panel scan-line circuit based on complementary dual-bootstrap

Shu-chung Yi, Zhi-Ming Lin, Po Yo Kuo, Hsin Chi Lai

Research output: Contribution to journalArticle

Abstract

This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-?m CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8 ?s and the average power is 0.74mW for a 5V supply voltage.

Original languageEnglish
Pages (from-to)1399-1403
Number of pages5
JournalIEICE Transactions on Electronics
VolumeE96-C
Issue number11
DOIs
Publication statusPublished - 2013 Jan 1

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Time delay
Networks (circuits)
Electric potential

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

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abstract = "This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-?m CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8 ?s and the average power is 0.74mW for a 5V supply voltage.",
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CMOS driver for heavy-load flat-panel scan-line circuit based on complementary dual-bootstrap. / Yi, Shu-chung; Lin, Zhi-Ming; Kuo, Po Yo; Lai, Hsin Chi.

In: IEICE Transactions on Electronics, Vol. E96-C, No. 11, 01.01.2013, p. 1399-1403.

Research output: Contribution to journalArticle

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