CMOS driver for heavy-load flat-panel scan-line circuit based on complementary dual-bootstrap

Shu Chung Yi; Zhi Ming Lin; Po Yo Kuo; Hsin Chi Lai

doi:10.1587/transele.E96.C.1399

CMOS driver for heavy-load flat-panel scan-line circuit based on complementary dual-bootstrap

Shu Chung Yi, Zhi Ming Lin, Po Yo Kuo, Hsin Chi Lai

Department of Computer Science and Information Engineering

Research output: Contribution to journal › Article

Abstract

This paper, presents a high-speed full swing driver for a heavy-load flat-panel scan-line circuit. The high driving capability is achieved using the proposed Complementary Dual-Bootstrap (CDUB) technique. The scan-line CDUB driver was fabricated in a 0.35-?m CMOS technology. The measured results, under the flat-panel scan-line load model, indicate that the delay time is within 2.8 ?s and the average power is 0.74mW for a 5V supply voltage.

Original language	English
Pages (from-to)	1399-1403
Number of pages	5
Journal	IEICE Transactions on Electronics
Volume	E96-C
Issue number	11
DOIs	https://doi.org/10.1587/transele.E96.C.1399
Publication status	Published - 2013 Nov

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All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

Cite this

Yi, S. C., Lin, Z. M., Kuo, P. Y., & Lai, H. C. (2013). CMOS driver for heavy-load flat-panel scan-line circuit based on complementary dual-bootstrap. IEICE Transactions on Electronics, E96-C(11), 1399-1403. https://doi.org/10.1587/transele.E96.C.1399

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Access to Document

10.1587/transele.E96.C.1399