Abstract
This paper proposes a system in a package (SiP) integrating a system on a chip (SoC) and a double-data-rate-three synchronous dynamic random access memory (DDR3 SDRAM) for advanced data-storage-based systems. The characteristics of high frequency, signal integrity (SI), and power integrity (PI) were investigated for the SoC/DDR3-SDRAM SiP. The SiP exhibited low insertion loss, wide eye-diagram aperture, and low power impedance. The effect of de-coupling capacitors on the SiP was also examined. The SoC/DDR3-SDRAM SiP achieved excellent performance for high-speed data storage applications.
| Original language | English |
|---|---|
| Article number | 6851288 |
| Journal | IEEE Transactions on Magnetics |
| Volume | 50 |
| Issue number | 7 |
| DOIs | |
| Publication status | Published - 2014 Jul 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
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Characteristics of System in a Package of Synchronous Dynamic Random Access Memory for High-Speed Data Storage Applications. / Lai, Yeong Lin; Chiang, Wen Jung.
In: IEEE Transactions on Magnetics, Vol. 50, No. 7, 6851288, 01.07.2014.Research output: Contribution to journal › Article
TY - JOUR
T1 - Characteristics of System in a Package of Synchronous Dynamic Random Access Memory for High-Speed Data Storage Applications
AU - Lai, Yeong Lin
AU - Chiang, Wen Jung
PY - 2014/7/1
Y1 - 2014/7/1
N2 - This paper proposes a system in a package (SiP) integrating a system on a chip (SoC) and a double-data-rate-three synchronous dynamic random access memory (DDR3 SDRAM) for advanced data-storage-based systems. The characteristics of high frequency, signal integrity (SI), and power integrity (PI) were investigated for the SoC/DDR3-SDRAM SiP. The SiP exhibited low insertion loss, wide eye-diagram aperture, and low power impedance. The effect of de-coupling capacitors on the SiP was also examined. The SoC/DDR3-SDRAM SiP achieved excellent performance for high-speed data storage applications.
AB - This paper proposes a system in a package (SiP) integrating a system on a chip (SoC) and a double-data-rate-three synchronous dynamic random access memory (DDR3 SDRAM) for advanced data-storage-based systems. The characteristics of high frequency, signal integrity (SI), and power integrity (PI) were investigated for the SoC/DDR3-SDRAM SiP. The SiP exhibited low insertion loss, wide eye-diagram aperture, and low power impedance. The effect of de-coupling capacitors on the SiP was also examined. The SoC/DDR3-SDRAM SiP achieved excellent performance for high-speed data storage applications.
UR - http://www.scopus.com/inward/record.url?scp=84952833626&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84952833626&partnerID=8YFLogxK
U2 - 10.1109/TMAG.2014.2306797
DO - 10.1109/TMAG.2014.2306797
M3 - Article
AN - SCOPUS:84952833626
VL - 50
JO - IEEE Transactions on Magnetics
JF - IEEE Transactions on Magnetics
SN - 0018-9464
IS - 7
M1 - 6851288
ER -