Abstract
This paper applied the Taguchi method to simulate the latch-up effect of nLDMOS to achieve an optimization design. The applied model is for an nLDMOS structure with high voltage well plus the adaptive (adjustment) layers of source & drain, and an N-type buried layer. Although the methods we could choose is abundant, we hope to effectively obtain the data which is useful for statistics in order to judge the correct characteristic of parameters. We applied the Taguchi method to perform an optimization in the paper. There are six parameters with two levels in this work, so we choose the Taguchi table to be L 8(2 7). By this way, it can decrease the times of experiment much effectively.
| Original language | English |
|---|---|
| Pages (from-to) | 81-84 |
| Number of pages | 4 |
| Journal | Advanced Materials Research |
| Volume | 482-484 |
| DOIs | |
| Publication status | Published - 2012 Apr 4 |
| Event | 3rd international Conference on Manufacturing Science and Engineering, ICMSE 2012 - Xiamen, China Duration: 2012 Mar 27 → 2012 Mar 29 |
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All Science Journal Classification (ASJC) codes
- Engineering(all)
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An optimization design in the HV nLDMOS by Taguchi method. / Chen, Shen Li; Wu, Tzung Shian; Chen, Yun Ru; Chen, Hung Wei; Shih, Chun Hsing; Chen, H. H.
In: Advanced Materials Research, Vol. 482-484, 04.04.2012, p. 81-84.Research output: Contribution to journal › Conference article
TY - JOUR
T1 - An optimization design in the HV nLDMOS by Taguchi method
AU - Chen, Shen Li
AU - Wu, Tzung Shian
AU - Chen, Yun Ru
AU - Chen, Hung Wei
AU - Shih, Chun Hsing
AU - Chen, H. H.
PY - 2012/4/4
Y1 - 2012/4/4
N2 - This paper applied the Taguchi method to simulate the latch-up effect of nLDMOS to achieve an optimization design. The applied model is for an nLDMOS structure with high voltage well plus the adaptive (adjustment) layers of source & drain, and an N-type buried layer. Although the methods we could choose is abundant, we hope to effectively obtain the data which is useful for statistics in order to judge the correct characteristic of parameters. We applied the Taguchi method to perform an optimization in the paper. There are six parameters with two levels in this work, so we choose the Taguchi table to be L 8(2 7). By this way, it can decrease the times of experiment much effectively.
AB - This paper applied the Taguchi method to simulate the latch-up effect of nLDMOS to achieve an optimization design. The applied model is for an nLDMOS structure with high voltage well plus the adaptive (adjustment) layers of source & drain, and an N-type buried layer. Although the methods we could choose is abundant, we hope to effectively obtain the data which is useful for statistics in order to judge the correct characteristic of parameters. We applied the Taguchi method to perform an optimization in the paper. There are six parameters with two levels in this work, so we choose the Taguchi table to be L 8(2 7). By this way, it can decrease the times of experiment much effectively.
UR - http://www.scopus.com/inward/record.url?scp=84859170732&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84859170732&partnerID=8YFLogxK
U2 - 10.4028/www.scientific.net/AMR.482-484.81
DO - 10.4028/www.scientific.net/AMR.482-484.81
M3 - Conference article
AN - SCOPUS:84859170732
VL - 482-484
SP - 81
EP - 84
JO - Advanced Materials Research
JF - Advanced Materials Research
SN - 1022-6680
ER -