An optimization design in the HV nLDMOS by Taguchi method

Shen Li Chen; Tzung Shian Wu; Yun Ru Chen; Hung Wei Chen; Chun Hsing Shih; H. H. Chen

doi:10.4028/www.scientific.net/AMR.482-484.81

An optimization design in the HV nLDMOS by Taguchi method

Shen Li Chen, Tzung Shian Wu, Yun Ru Chen, Hung Wei Chen, Chun Hsing Shih, H. H. Chen

Department of Electronic Engineering

Research output: Contribution to journal › Conference article

1 Citation (Scopus)

Abstract

This paper applied the Taguchi method to simulate the latch-up effect of nLDMOS to achieve an optimization design. The applied model is for an nLDMOS structure with high voltage well plus the adaptive (adjustment) layers of source & drain, and an N-type buried layer. Although the methods we could choose is abundant, we hope to effectively obtain the data which is useful for statistics in order to judge the correct characteristic of parameters. We applied the Taguchi method to perform an optimization in the paper. There are six parameters with two levels in this work, so we choose the Taguchi table to be L ₈(2 ⁷). By this way, it can decrease the times of experiment much effectively.

Original language	English
Pages (from-to)	81-84
Number of pages	4
Journal	Advanced Materials Research
Volume	482-484
DOIs	https://doi.org/10.4028/www.scientific.net/AMR.482-484.81
Publication status	Published - 2012 Apr 4
Event	3rd international Conference on Manufacturing Science and Engineering, ICMSE 2012 - Xiamen, China Duration: 2012 Mar 27 → 2012 Mar 29

All Science Journal Classification (ASJC) codes

Engineering(all)

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Chen, S. L., Wu, T. S., Chen, Y. R., Chen, H. W., Shih, C. H., & Chen, H. H. (2012). An optimization design in the HV nLDMOS by Taguchi method. Advanced Materials Research, 482-484, 81-84. https://doi.org/10.4028/www.scientific.net/AMR.482-484.81

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abstract = "This paper applied the Taguchi method to simulate the latch-up effect of nLDMOS to achieve an optimization design. The applied model is for an nLDMOS structure with high voltage well plus the adaptive (adjustment) layers of source & drain, and an N-type buried layer. Although the methods we could choose is abundant, we hope to effectively obtain the data which is useful for statistics in order to judge the correct characteristic of parameters. We applied the Taguchi method to perform an optimization in the paper. There are six parameters with two levels in this work, so we choose the Taguchi table to be L 8(2 7). By this way, it can decrease the times of experiment much effectively.",

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AU - Wu, Tzung Shian

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AU - Shih, Chun Hsing

AU - Chen, H. H.

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AB - This paper applied the Taguchi method to simulate the latch-up effect of nLDMOS to achieve an optimization design. The applied model is for an nLDMOS structure with high voltage well plus the adaptive (adjustment) layers of source & drain, and an N-type buried layer. Although the methods we could choose is abundant, we hope to effectively obtain the data which is useful for statistics in order to judge the correct characteristic of parameters. We applied the Taguchi method to perform an optimization in the paper. There are six parameters with two levels in this work, so we choose the Taguchi table to be L 8(2 7). By this way, it can decrease the times of experiment much effectively.

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