An Efficient Algorithm for Selecting Bipartite Row or Column Folding of Programmable Logic Arrays

Bin Da Liu; Kai Cheng Wei

doi:10.1109/81.298365

An Efficient Algorithm for Selecting Bipartite Row or Column Folding of Programmable Logic Arrays

Bin Da Liu, Kai Cheng Wei

Department of Computer Science and Information Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

-Different from the previous PLA folding algorithms which perform row and column foldings independently, we propose an algorithm to obtain bipartite row or column folding result on the same graph. The PLA personality matrix is modeled as a graph and the folding problem is modeled as a partitioning problem. Experimental results show that this algorithm can lead a good guide to select row or column folding for reducing the chip area of the PLA efficiently.

Original language	English
Pages (from-to)	494-498
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
Volume	41
Issue number	7
DOIs	https://doi.org/10.1109/81.298365
Publication status	Published - 1994 Jul

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/81.298365

Cite this

@article{6937702304ad46318fc8a8bbf9e1df38,

title = "An Efficient Algorithm for Selecting Bipartite Row or Column Folding of Programmable Logic Arrays",

abstract = "-Different from the previous PLA folding algorithms which perform row and column foldings independently, we propose an algorithm to obtain bipartite row or column folding result on the same graph. The PLA personality matrix is modeled as a graph and the folding problem is modeled as a partitioning problem. Experimental results show that this algorithm can lead a good guide to select row or column folding for reducing the chip area of the PLA efficiently.",

author = "Liu, {Bin Da} and Wei, {Kai Cheng}",

note = "Funding Information: Manuscript received February 8, 1993; revised October 20, 1993. This work was supported by the National Science Council, Republic of China, under Contract NSC-82-0404-E-00&220. This paper was recommended by Associate Editor Isao Shirakawa. The authors are with the Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan 70101, Republic of China. IEEE Log Number 9400333.",

year = "1994",

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T1 - An Efficient Algorithm for Selecting Bipartite Row or Column Folding of Programmable Logic Arrays

AU - Liu, Bin Da

AU - Wei, Kai Cheng

N1 - Funding Information: Manuscript received February 8, 1993; revised October 20, 1993. This work was supported by the National Science Council, Republic of China, under Contract NSC-82-0404-E-00&220. This paper was recommended by Associate Editor Isao Shirakawa. The authors are with the Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan 70101, Republic of China. IEEE Log Number 9400333.

PY - 1994/7

Y1 - 1994/7

N2 - -Different from the previous PLA folding algorithms which perform row and column foldings independently, we propose an algorithm to obtain bipartite row or column folding result on the same graph. The PLA personality matrix is modeled as a graph and the folding problem is modeled as a partitioning problem. Experimental results show that this algorithm can lead a good guide to select row or column folding for reducing the chip area of the PLA efficiently.

AB - -Different from the previous PLA folding algorithms which perform row and column foldings independently, we propose an algorithm to obtain bipartite row or column folding result on the same graph. The PLA personality matrix is modeled as a graph and the folding problem is modeled as a partitioning problem. Experimental results show that this algorithm can lead a good guide to select row or column folding for reducing the chip area of the PLA efficiently.

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