A supply-gating scheme for both data-retention and spike-reduction in power management and test scheduling

Tsung Chu Huang, Jing Chi Tzeng, Yuan Wei Chao, Ji Jan Chen, Wei Ting Liu, Kuen Jong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)
Original languageEnglish
Title of host publication2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Proceedings of Technical Papers
Pages167-170
Number of pages4
DOIs
Publication statusPublished - 2007 Oct 1
Event2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Hsinchu, Taiwan
Duration: 2007 Apr 262007 Apr 28

Publication series

Name2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006 - Proceedings of Technical Papers

Other

Other2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006
CountryTaiwan
CityHsinchu
Period07-04-2607-04-28

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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