A pipeline structure for high-speed step-by-step RS decoding

Tung-Chou Chen, Che Ho Wei, Shyue Win Wei

Research output: Contribution to journal › Letter

3 Citations (Scopus)

Abstract

Based on a modified step-by-step decoding procedure, a high-speed pipelined Reed-Solomon decoder is presented. The decoder requires only the delay time of three 2-input XOR gates for decoding each coded symbol. The decoder can be operated in a bit rate of Gbits/sec order and thus suitable for the very high speed data transmission systems.

Original languageEnglish
Pages (from-to)847-849
Number of pages3
JournalIEICE Transactions on Communications
VolumeE86-B
Issue number2
Publication statusPublished - 2003 Jan 1

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Decoding
Pipelines
Data communication systems
Time delay

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Networks and Communications
  • Electrical and Electronic Engineering

Cite this

Chen, Tung-Chou ; Wei, Che Ho ; Wei, Shyue Win. / A pipeline structure for high-speed step-by-step RS decoding. In: IEICE Transactions on Communications. 2003 ; Vol. E86-B, No. 2. pp. 847-849.
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Chen, T-C, Wei, CH & Wei, SW 2003, 'A pipeline structure for high-speed step-by-step RS decoding', IEICE Transactions on Communications, vol. E86-B, no. 2, pp. 847-849.

A pipeline structure for high-speed step-by-step RS decoding. / Chen, Tung-Chou; Wei, Che Ho; Wei, Shyue Win.

In: IEICE Transactions on Communications, Vol. E86-B, No. 2, 01.01.2003, p. 847-849.

Research output: Contribution to journal › Letter

TY - JOUR

T1 - A pipeline structure for high-speed step-by-step RS decoding

AU - Chen, Tung-Chou

AU - Wei, Che Ho

AU - Wei, Shyue Win

PY - 2003/1/1

Y1 - 2003/1/1

N2 - Based on a modified step-by-step decoding procedure, a high-speed pipelined Reed-Solomon decoder is presented. The decoder requires only the delay time of three 2-input XOR gates for decoding each coded symbol. The decoder can be operated in a bit rate of Gbits/sec order and thus suitable for the very high speed data transmission systems.

AB - Based on a modified step-by-step decoding procedure, a high-speed pipelined Reed-Solomon decoder is presented. The decoder requires only the delay time of three 2-input XOR gates for decoding each coded symbol. The decoder can be operated in a bit rate of Gbits/sec order and thus suitable for the very high speed data transmission systems.

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M3 - Letter

VL - E86-B

SP - 847

EP - 849

JO - IEICE Transactions on Communications

JF - IEICE Transactions on Communications

SN - 0916-8516

IS - 2

ER -

Chen T-C, Wei CH, Wei SW. A pipeline structure for high-speed step-by-step RS decoding. IEICE Transactions on Communications. 2003 Jan 1;E86-B(2):847-849.

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