A novel cold-FET method for determining extrinsic capacitances using a capacitive transmission line model

Yeong-Lin Lai; Cheng Tsung Chen

A novel cold-FET method for determining extrinsic capacitances using a capacitive transmission line model

Yeong-Lin Lai, Cheng Tsung Chen

Department of Mechatronic Engineering

Research output: Contribution to journal › Conference article

2 Citations (Scopus)

Abstract

A novel cold-FET method using a capacitive transmission line (CTL) model to extract extrinsic capacitances for the small-signal equivalent circuit of field-effect transistors (FET's) is proposed. The extrinsic gate capacitance (C_pg) and drain capacitance (C_pd) of the FET's are extracted on the basis of the distributed CTL model and ABCD matrix representation for the depletion region beneath gate under the pinched-off cold-FET condition. The extraction method proposed is applied to obtain the small-signal equivalent circuit model for the FET's. The simulated S parameters using the CTL model exhibit great agreement with the measured S parameters.

Original language	English
Pages (from-to)	1261-1264
Number of pages	4
Journal	IEEE MTT-S International Microwave Symposium Digest
Volume	2
Publication status	Published - 2001 Dec 1
Event	International Microwave Symposium Digest IEEE-MTT-S 2001 - Phoenix, AZ, United States Duration: 2001 May 20 → 2001 May 22

All Science Journal Classification (ASJC) codes

Radiation
Condensed Matter Physics
Electrical and Electronic Engineering

Access to Document

Fingerprint Dive into the research topics of 'A novel cold-FET method for determining extrinsic capacitances using a capacitive transmission line model'. Together they form a unique fingerprint.

Cite this

Lai, Y-L., & Chen, C. T. (2001). A novel cold-FET method for determining extrinsic capacitances using a capacitive transmission line model. IEEE MTT-S International Microwave Symposium Digest, 2, 1261-1264.

@article{17af17cfcd6544f4aa414041d0714b2e,

title = "A novel cold-FET method for determining extrinsic capacitances using a capacitive transmission line model",

abstract = "A novel cold-FET method using a capacitive transmission line (CTL) model to extract extrinsic capacitances for the small-signal equivalent circuit of field-effect transistors (FET's) is proposed. The extrinsic gate capacitance (Cpg) and drain capacitance (Cpd) of the FET's are extracted on the basis of the distributed CTL model and ABCD matrix representation for the depletion region beneath gate under the pinched-off cold-FET condition. The extraction method proposed is applied to obtain the small-signal equivalent circuit model for the FET's. The simulated S parameters using the CTL model exhibit great agreement with the measured S parameters.",

author = "Yeong-Lin Lai and Chen, {Cheng Tsung}",

year = "2001",

month = dec,

day = "1",

language = "English",

volume = "2",

pages = "1261--1264",

journal = "IEEE MTT-S International Microwave Symposium Digest",

issn = "0149-645X",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "International Microwave Symposium Digest IEEE-MTT-S 2001 ; Conference date: 20-05-2001 Through 22-05-2001",

}

TY - JOUR

T1 - A novel cold-FET method for determining extrinsic capacitances using a capacitive transmission line model

AU - Lai, Yeong-Lin

AU - Chen, Cheng Tsung

PY - 2001/12/1

Y1 - 2001/12/1

N2 - A novel cold-FET method using a capacitive transmission line (CTL) model to extract extrinsic capacitances for the small-signal equivalent circuit of field-effect transistors (FET's) is proposed. The extrinsic gate capacitance (Cpg) and drain capacitance (Cpd) of the FET's are extracted on the basis of the distributed CTL model and ABCD matrix representation for the depletion region beneath gate under the pinched-off cold-FET condition. The extraction method proposed is applied to obtain the small-signal equivalent circuit model for the FET's. The simulated S parameters using the CTL model exhibit great agreement with the measured S parameters.

AB - A novel cold-FET method using a capacitive transmission line (CTL) model to extract extrinsic capacitances for the small-signal equivalent circuit of field-effect transistors (FET's) is proposed. The extrinsic gate capacitance (Cpg) and drain capacitance (Cpd) of the FET's are extracted on the basis of the distributed CTL model and ABCD matrix representation for the depletion region beneath gate under the pinched-off cold-FET condition. The extraction method proposed is applied to obtain the small-signal equivalent circuit model for the FET's. The simulated S parameters using the CTL model exhibit great agreement with the measured S parameters.

UR - http://www.scopus.com/inward/record.url?scp=0035689679&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0035689679&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0035689679

VL - 2

SP - 1261

EP - 1264

JO - IEEE MTT-S International Microwave Symposium Digest

JF - IEEE MTT-S International Microwave Symposium Digest

SN - 0149-645X

T2 - International Microwave Symposium Digest IEEE-MTT-S 2001

Y2 - 20 May 2001 through 22 May 2001

ER -