Abstract
We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/Si02 stencil mask with very well undercutting profile of Si02 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.
| Original language | English |
|---|---|
| Pages (from-to) | 2734-2736 |
| Number of pages | 3 |
| Journal | IEEE Transactions on Magnetics |
| Volume | 44 |
| Issue number | 11 PART 2 |
| DOIs | |
| Publication status | Published - 2008 Nov 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
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A novel bottom-up fabrication process for controllable sub-100 nm magnetic multilayer devices. / Kao, Ming Yuan; Ou, J. Y.; Horng, Lance; Wu, Jong Ching.
In: IEEE Transactions on Magnetics, Vol. 44, No. 11 PART 2, 01.11.2008, p. 2734-2736.Research output: Contribution to journal › Article
TY - JOUR
T1 - A novel bottom-up fabrication process for controllable sub-100 nm magnetic multilayer devices
AU - Kao, Ming Yuan
AU - Ou, J. Y.
AU - Horng, Lance
AU - Wu, Jong Ching
PY - 2008/11/1
Y1 - 2008/11/1
N2 - We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/Si02 stencil mask with very well undercutting profile of Si02 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.
AB - We present a fabrication process for controllable sub-100 nm magnetic multilayer devices, pseudo spin valve, using a novel bottom-up technique. Stack of multilayer devices with diameter in nanometer scales were successfully made through a template of Ge/Si02 stencil mask with very well undercutting profile of Si02 insulating layer. The niche of using this method is that a device with diameter below 100 nm can be made through a twice larger Ge hole of stencil mask. The desired dimension of the active device layers was achieved with a thick buffer metal layer deposited first, giving rise to a narrower neck for later active layers deposition. Moreover, this stencil mask technique can be utilized as device templates of not only magnetic multilayer devices but also other nano-sized devices such as phase changed memory devices.
UR - http://www.scopus.com/inward/record.url?scp=77955123541&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77955123541&partnerID=8YFLogxK
U2 - 10.1109/TMAG.2008.2001502
DO - 10.1109/TMAG.2008.2001502
M3 - Article
AN - SCOPUS:77955123541
VL - 44
SP - 2734
EP - 2736
JO - IEEE Transactions on Magnetics
JF - IEEE Transactions on Magnetics
SN - 0018-9464
IS - 11 PART 2
ER -