A new construction adder based on Chinese abacus algorithm

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

A new construction adder based on Chinese abacus algorithm is presented in this paper. There are two kinds of beads used in this construction. Each column element has three higher beads with a weight of four and three lower beads with a weight of one. The proposed 32-bit adder contains eight column elements. The construction was simulated by the technology of TSMC 0.18 μm CMOS process. Layout was also made by the same technology. The maximum delay of the 32-bit abacus adder is 0.91 ns and 14% less than that of Carry Look-ahead Adders for 0.18 μm technology. The power consumption of the abacus adder is 3.1 mW and 28% less than that of Carry Look-ahead Adders for 0.18 μm technology. Recent researches are compared with the proposed adder. The construction was also simulated by Predictive Technology Model. The PTM results also presented. The use of Chinese abacus approach offers a competitive technique with respect to other adders.

Original languageEnglish
Pages (from-to)185-193
Number of pages9
JournalComputers and Electrical Engineering
Volume38
Issue number2
DOIs
Publication statusPublished - 2012 Mar 1

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Adders
Pulse time modulation
Electric power utilization

All Science Journal Classification (ASJC) codes

  • Control and Systems Engineering
  • Computer Science(all)
  • Electrical and Electronic Engineering

Cite this

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title = "A new construction adder based on Chinese abacus algorithm",
abstract = "A new construction adder based on Chinese abacus algorithm is presented in this paper. There are two kinds of beads used in this construction. Each column element has three higher beads with a weight of four and three lower beads with a weight of one. The proposed 32-bit adder contains eight column elements. The construction was simulated by the technology of TSMC 0.18 μm CMOS process. Layout was also made by the same technology. The maximum delay of the 32-bit abacus adder is 0.91 ns and 14{\%} less than that of Carry Look-ahead Adders for 0.18 μm technology. The power consumption of the abacus adder is 3.1 mW and 28{\%} less than that of Carry Look-ahead Adders for 0.18 μm technology. Recent researches are compared with the proposed adder. The construction was also simulated by Predictive Technology Model. The PTM results also presented. The use of Chinese abacus approach offers a competitive technique with respect to other adders.",
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A new construction adder based on Chinese abacus algorithm. / Yi, Shu Chung.

In: Computers and Electrical Engineering, Vol. 38, No. 2, 01.03.2012, p. 185-193.

Research output: Contribution to journalArticle

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