A new architecture of thermopiles array with WTA implemenation

Kuan Chou Hou; Chih-Hsiung Shen

doi:10.1109/ICSENS.2005.1597885

A new architecture of thermopiles array with WTA implemenation

Kuan Chou Hou, Chih-Hsiung Shen

Department of Mechatronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

In this paper a novel architecture of a thermopile array imager for high speed target's position identification is presented. The sensor array fully integrated in CMOS standard technology, features pixel access and in a particular topology also position detection. According to the description given, with larger absorbing area of floating membrane and therefore less thermal conductance per pixel, is used for the quick estimation of the rough values for spot position and intensity. The winner-take-all (WTA) circuit is used in combination with readout circuit for determining which of the 16x16 pixels has received the largest amount of infrared radiation. It is a parallel structure of 16x16 cells connected to a common control line. The results obtained so far have shown that integrated thermopile array have reached a high level of development and reliability that are suited for high accuracy infrared tracking applications.

Original language	English
Title of host publication	Proceedings of the Fourth IEEE Conference on Sensors 2005
Pages	1057-1060
Number of pages	4
Volume	2005
DOIs	https://doi.org/10.1109/ICSENS.2005.1597885
Publication status	Published - 2005 Dec 1
Event	Fourth IEEE Conference on Sensors 2005 - Irvine, CA, United States Duration: 2005 Oct 31 → 2005 Nov 3

Other

Other	Fourth IEEE Conference on Sensors 2005
Country	United States
City	Irvine, CA
Period	05-10-31 → 05-11-03

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/ICSENS.2005.1597885

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@inproceedings{0bff67ab2f1d4c6c83af38e4ab4c0087,

title = "A new architecture of thermopiles array with WTA implemenation",

abstract = "In this paper a novel architecture of a thermopile array imager for high speed target's position identification is presented. The sensor array fully integrated in CMOS standard technology, features pixel access and in a particular topology also position detection. According to the description given, with larger absorbing area of floating membrane and therefore less thermal conductance per pixel, is used for the quick estimation of the rough values for spot position and intensity. The winner-take-all (WTA) circuit is used in combination with readout circuit for determining which of the 16x16 pixels has received the largest amount of infrared radiation. It is a parallel structure of 16x16 cells connected to a common control line. The results obtained so far have shown that integrated thermopile array have reached a high level of development and reliability that are suited for high accuracy infrared tracking applications.",

author = "Hou, {Kuan Chou} and Chih-Hsiung Shen",

year = "2005",

month = dec,

day = "1",

doi = "10.1109/ICSENS.2005.1597885",

language = "English",

isbn = "0780390563",

volume = "2005",

pages = "1057--1060",

booktitle = "Proceedings of the Fourth IEEE Conference on Sensors 2005",

note = "Fourth IEEE Conference on Sensors 2005 ; Conference date: 31-10-2005 Through 03-11-2005",

}

TY - GEN

T1 - A new architecture of thermopiles array with WTA implemenation

AU - Hou, Kuan Chou

AU - Shen, Chih-Hsiung

PY - 2005/12/1

Y1 - 2005/12/1

N2 - In this paper a novel architecture of a thermopile array imager for high speed target's position identification is presented. The sensor array fully integrated in CMOS standard technology, features pixel access and in a particular topology also position detection. According to the description given, with larger absorbing area of floating membrane and therefore less thermal conductance per pixel, is used for the quick estimation of the rough values for spot position and intensity. The winner-take-all (WTA) circuit is used in combination with readout circuit for determining which of the 16x16 pixels has received the largest amount of infrared radiation. It is a parallel structure of 16x16 cells connected to a common control line. The results obtained so far have shown that integrated thermopile array have reached a high level of development and reliability that are suited for high accuracy infrared tracking applications.

AB - In this paper a novel architecture of a thermopile array imager for high speed target's position identification is presented. The sensor array fully integrated in CMOS standard technology, features pixel access and in a particular topology also position detection. According to the description given, with larger absorbing area of floating membrane and therefore less thermal conductance per pixel, is used for the quick estimation of the rough values for spot position and intensity. The winner-take-all (WTA) circuit is used in combination with readout circuit for determining which of the 16x16 pixels has received the largest amount of infrared radiation. It is a parallel structure of 16x16 cells connected to a common control line. The results obtained so far have shown that integrated thermopile array have reached a high level of development and reliability that are suited for high accuracy infrared tracking applications.

UR - http://www.scopus.com/inward/record.url?scp=33847255575&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33847255575&partnerID=8YFLogxK

U2 - 10.1109/ICSENS.2005.1597885

DO - 10.1109/ICSENS.2005.1597885

M3 - Conference contribution

AN - SCOPUS:33847255575

SN - 0780390563

SN - 9780780390560

VL - 2005

SP - 1057

EP - 1060

BT - Proceedings of the Fourth IEEE Conference on Sensors 2005

T2 - Fourth IEEE Conference on Sensors 2005

Y2 - 31 October 2005 through 3 November 2005

ER -