A low-power and high-linear double-balanced switching mixer

Jun Da Chen; Zhi Ming Lin

doi:10.1145/1127908.1127941

A low-power and high-linear double-balanced switching mixer

Jun Da Chen, Zhi Ming Lin

Department of Computer Science and Information Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

1 Citation (Scopus)

Abstract

The paper presents a novel topology mixer that leads to better performance in terms of linearity and power consumption for low supply voltage. Designed in umc 0.18μm CMOS technology, the mixer achieves: 4.55dB power conversion gain; 13.3dB noise figure; 4dBm input third-order intercept point (IIP3); and only 2mW of power consumption from a IV supply voltage.

Original language	English
Title of host publication	GLSVLSI'06 - Proceedings of the 2006 ACM Great Lakes Symposium on VLSI
Publisher	Association for Computing Machinery (ACM)
Pages	131-134
Number of pages	4
ISBN (Print)	1595933476, 9781595933478
DOIs	https://doi.org/10.1145/1127908.1127941
Publication status	Published - 2006 Jan 1
Event	GLSVLSI'06 - 2006 ACM Great Lakes Symposium on VLSI - Philadelphia, PA, United States Duration: 2006 Apr 30 → 2006 May 2

Publication series

Name	Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Volume	2006

Other

Other	GLSVLSI'06 - 2006 ACM Great Lakes Symposium on VLSI
Country	United States
City	Philadelphia, PA
Period	06-04-30 → 06-05-02

All Science Journal Classification (ASJC) codes

Engineering(all)

Access to Document

10.1145/1127908.1127941

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Chen, J. D., & Lin, Z. M. (2006). A low-power and high-linear double-balanced switching mixer. In GLSVLSI'06 - Proceedings of the 2006 ACM Great Lakes Symposium on VLSI (pp. 131-134). (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI; Vol. 2006). Association for Computing Machinery (ACM). https://doi.org/10.1145/1127908.1127941

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abstract = "The paper presents a novel topology mixer that leads to better performance in terms of linearity and power consumption for low supply voltage. Designed in umc 0.18μm CMOS technology, the mixer achieves: 4.55dB power conversion gain; 13.3dB noise figure; 4dBm input third-order intercept point (IIP3); and only 2mW of power consumption from a IV supply voltage.",

author = "Chen, {Jun Da} and Lin, {Zhi Ming}",

year = "2006",

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Chen, JD & Lin, ZM 2006, A low-power and high-linear double-balanced switching mixer. in GLSVLSI'06 - Proceedings of the 2006 ACM Great Lakes Symposium on VLSI. Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, vol. 2006, Association for Computing Machinery (ACM), pp. 131-134, GLSVLSI'06 - 2006 ACM Great Lakes Symposium on VLSI, Philadelphia, PA, United States, 06-04-30. https://doi.org/10.1145/1127908.1127941

A low-power and high-linear double-balanced switching mixer. / Chen, Jun Da; Lin, Zhi Ming.

GLSVLSI'06 - Proceedings of the 2006 ACM Great Lakes Symposium on VLSI. Association for Computing Machinery (ACM), 2006. p. 131-134 (Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI; Vol. 2006).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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