A low offset high voltage swing rail-to-rail buffer amplifier with for LCD driver

Guo Teng Hong; Chih Hsiung Shen

doi:10.1109/EDSSC.2007.4450302

A low offset high voltage swing rail-to-rail buffer amplifier with for LCD driver

Guo Teng Hong, Chih Hsiung Shen

Department of Mechatronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

Abstract

This paper presents a design and implementation of an output buffer for LCD Driver with rail-to-rail voltage swing using TSMC 0.35 μm 2P4M process at 5V supply. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. It performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , One is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kQ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits the settling times of 0.7 us for rising and 0.85 μs for falling edges with voltage swing 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm₂ with build-in offset voltage holding capacitor.

Original language	English
Title of host publication	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
Pages	1025-1030
Number of pages	6
DOIs	https://doi.org/10.1109/EDSSC.2007.4450302
Publication status	Published - 2007 Dec 1
Event	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007 - Tainan, Taiwan Duration: 2007 Dec 20 → 2007 Dec 22

Publication series

Name	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007

Other

Other	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
Country	Taiwan
City	Tainan
Period	07-12-20 → 07-12-22

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/EDSSC.2007.4450302

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Cite this

@inproceedings{33406678c7e9469285bedacf05c6aa9d,

title = "A low offset high voltage swing rail-to-rail buffer amplifier with for LCD driver",

abstract = "This paper presents a design and implementation of an output buffer for LCD Driver with rail-to-rail voltage swing using TSMC 0.35 μm 2P4M process at 5V supply. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. It performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , One is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kQ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits the settling times of 0.7 us for rising and 0.85 μs for falling edges with voltage swing 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm2 with build-in offset voltage holding capacitor.",

author = "Hong, {Guo Teng} and Shen, {Chih Hsiung}",

year = "2007",

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pages = "1025--1030",

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note = "IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007 ; Conference date: 20-12-2007 Through 22-12-2007",

}

Hong, GT & Shen, CH 2007, A low offset high voltage swing rail-to-rail buffer amplifier with for LCD driver. in IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007., 4450302, IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007, pp. 1025-1030, IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007, Tainan, Taiwan, 07-12-20. https://doi.org/10.1109/EDSSC.2007.4450302

A low offset high voltage swing rail-to-rail buffer amplifier with for LCD driver. / Hong, Guo Teng; Shen, Chih Hsiung.

IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007. 2007. p. 1025-1030 4450302 (IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - This paper presents a design and implementation of an output buffer for LCD Driver with rail-to-rail voltage swing using TSMC 0.35 μm 2P4M process at 5V supply. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. It performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , One is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kQ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits the settling times of 0.7 us for rising and 0.85 μs for falling edges with voltage swing 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm2 with build-in offset voltage holding capacitor.

AB - This paper presents a design and implementation of an output buffer for LCD Driver with rail-to-rail voltage swing using TSMC 0.35 μm 2P4M process at 5V supply. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. It performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , One is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kQ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits the settling times of 0.7 us for rising and 0.85 μs for falling edges with voltage swing 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm2 with build-in offset voltage holding capacitor.

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