A low offset high voltage swing rail-to-rail buffer amplifier for LCD driver

Guo Teng Hong; Chih-Hsiung Shen

doi:10.1109/EDSSC.2007.4450257

A low offset high voltage swing rail-to-rail buffer amplifier for LCD driver

Guo Teng Hong, Chih-Hsiung Shen

Department of Mechatronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

The size of LCDs is getting larger in particular , it is essential to compromise the driving ability. So , source drivers with high performance , high resolution , and low power dissipation will achieve more additional value. This paper presents a design and implementation of using 10-bit multiple DAC ( Digital to Analog Converter ) for the driver , and proposes a rail-to-rail output buffer with low offset and high driving ability. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. With the H-SPICE model of TSMC 0.35μm 2P4M 3.3V / 5V process , the maximum offset is less than 2mV , and the input / output swing are nearly full swing. Besides , it also performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , one is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kΩ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits that the settling time are within 5μs under the max voltage swing with voltage 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm² with build-in offset voltage holding capacitor.

Original language	English
Title of host publication	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
Pages	841-846
Number of pages	6
DOIs	https://doi.org/10.1109/EDSSC.2007.4450257
Publication status	Published - 2007 Dec 1
Event	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007 - Tainan, Taiwan Duration: 2007 Dec 20 → 2007 Dec 22

Publication series

Name	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007

Other

Other	IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007
Country	Taiwan
City	Tainan
Period	07-12-20 → 07-12-22

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All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Cite this

Hong, G. T., & Shen, C-H. (2007). A low offset high voltage swing rail-to-rail buffer amplifier for LCD driver. In IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007 (pp. 841-846). [4450257] (IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007). https://doi.org/10.1109/EDSSC.2007.4450257

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title = "A low offset high voltage swing rail-to-rail buffer amplifier for LCD driver",

abstract = "The size of LCDs is getting larger in particular , it is essential to compromise the driving ability. So , source drivers with high performance , high resolution , and low power dissipation will achieve more additional value. This paper presents a design and implementation of using 10-bit multiple DAC ( Digital to Analog Converter ) for the driver , and proposes a rail-to-rail output buffer with low offset and high driving ability. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. With the H-SPICE model of TSMC 0.35μm 2P4M 3.3V / 5V process , the maximum offset is less than 2mV , and the input / output swing are nearly full swing. Besides , it also performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , one is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kΩ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits that the settling time are within 5μs under the max voltage swing with voltage 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm2 with build-in offset voltage holding capacitor.",

author = "Hong, {Guo Teng} and Chih-Hsiung Shen",

year = "2007",

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doi = "10.1109/EDSSC.2007.4450257",

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note = "IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007 ; Conference date: 20-12-2007 Through 22-12-2007",

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Hong, GT & Shen, C-H 2007, A low offset high voltage swing rail-to-rail buffer amplifier for LCD driver. in IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007., 4450257, IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007, pp. 841-846, IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007, Tainan, Taiwan, 07-12-20. https://doi.org/10.1109/EDSSC.2007.4450257

A low offset high voltage swing rail-to-rail buffer amplifier for LCD driver. / Hong, Guo Teng; Shen, Chih-Hsiung.

IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007. 2007. p. 841-846 4450257 (IEEE Conference on Electron Devices and Solid-State Circuits 2007, EDSSC 2007).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N2 - The size of LCDs is getting larger in particular , it is essential to compromise the driving ability. So , source drivers with high performance , high resolution , and low power dissipation will achieve more additional value. This paper presents a design and implementation of using 10-bit multiple DAC ( Digital to Analog Converter ) for the driver , and proposes a rail-to-rail output buffer with low offset and high driving ability. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. With the H-SPICE model of TSMC 0.35μm 2P4M 3.3V / 5V process , the maximum offset is less than 2mV , and the input / output swing are nearly full swing. Besides , it also performs a rail-to-rail swing range and high slew rate of 14 V / μs and 11.5 V / μs for rising and falling edges under a 400 pF capacitance load. For high driving capability , two push-pull output stages are used , two frequency compensation stages are also introduced for stability , one is the miller compensation with 0.04 pF capacitance , and the other is zero compensation with 0.1 kΩ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits that the settling time are within 5μs under the max voltage swing with voltage 5V under a 400 pF capacitance load. Even under a 1000 pF capacitance load , it still has the settling time of 1.52 μs and 1.80 μs for rising and falling edges , respectively. The effective area of this buffer is only 100 × 100 μm2 with build-in offset voltage holding capacitor.

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Access to Document

10.1109/EDSSC.2007.4450257