A low offset high voltage swing buffer for LCD driver

Wei Te Lin, Chih-Hsiung Shen

Research output: Chapter in Book/Report/Conference proceedingConference contribution


This paper presents a design and implementation of an output buffer for LCD Driver with rail-to-rail voltage swing using TSMC 0.35 μm 2P4M process at 5 V supply. We designed a class-B output buffer with offset compensation ability to reduce the nonlinearity of output voltage. It performs a rail-to-rail swing range and high slew rate of 10.3 V/μs and 8. 3 V/μs for rising and falling edges under a 600 pF capacitance load. For high driving capability, two push-pull output stages are used, two frequency compensation stages are also introduced for stability. One is the miller compensation with 0.04 pF capacitance, and the other is zeros compensation with 0.1 kΩ added between two push-pull output stages for stable driving under different capacitance loads. The result exhibits the settling times of 1. 3 μs for rising and 1.45 μs for falling edges with voltage swing of 5 V under a 600 pF capacitance load. Even under a 1 000 pF capacitance load, it still has the settling time of 2.12 μs and 2. 38 μs for rising and falling edges, respectively. The effective area of this buffer is only 100 × 100 μm2 with build-in offset voltage holding capacitor.

Original languageEnglish
Title of host publicationAD'07 - Proceedings of Asia Display 2007
Number of pages6
Publication statusPublished - 2007 Dec 1
EventAsia Display 2007, AD'07 - Shanghai, China
Duration: 2007 Mar 122007 Mar 16

Publication series

NameAD'07 - Proceedings of Asia Display 2007


OtherAsia Display 2007, AD'07

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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