A fast probability-based algorithm for leakage current reduction considering controller cost

Tsung-Yi Wu, Jr Luen Tzeng

Research output: Contribution to journalArticle

Abstract

Because the leakage current of a digital circuit depends on the states of the circuit's logic gates, assigning a minimum leakage vector (MLV) for the primary inputs and the flip-flops' outputs of the circuit that operates in the sleep mode is a popular technique for leakage current reduction. In this paper, we propose a novel probability-based algorithm and technique that can rapidly find an MLV. Unlike most traditional techniques that ignore the leakage current overhead of the newborn vector controller, our technique can take this overhead into account. Ignoring this overhead during solution space exploration may bring a side effect that is misrecognizing a non-optimal solution as an optimal one. Experimental results show that our heuristic algorithm can reduce the leakage current up to 59.5% and can find the optimal solutions on most of the small MCNC benchmark circuits. Moreover, the required CPU time of our probability-based program is significantly less than that of a random search program.

Original languageEnglish
Pages (from-to)2718-2726
Number of pages9
JournalIEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
VolumeE90-A
Issue number12
DOIs
Publication statusPublished - 2007 Jan 1

Fingerprint

Leakage Current
Leakage currents
Controller
Controllers
Costs
Leakage
Networks (circuits)
Sleep Mode
Digital Circuits
Random Search
Logic gates
Flip flop circuits
Digital circuits
Heuristic algorithms
CPU Time
Flip
Heuristic algorithm
Program processors
Optimal Solution
Logic

All Science Journal Classification (ASJC) codes

  • Signal Processing
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering
  • Applied Mathematics

Cite this

@article{654eb782f62643cb871a170b31335ee4,
title = "A fast probability-based algorithm for leakage current reduction considering controller cost",
abstract = "Because the leakage current of a digital circuit depends on the states of the circuit's logic gates, assigning a minimum leakage vector (MLV) for the primary inputs and the flip-flops' outputs of the circuit that operates in the sleep mode is a popular technique for leakage current reduction. In this paper, we propose a novel probability-based algorithm and technique that can rapidly find an MLV. Unlike most traditional techniques that ignore the leakage current overhead of the newborn vector controller, our technique can take this overhead into account. Ignoring this overhead during solution space exploration may bring a side effect that is misrecognizing a non-optimal solution as an optimal one. Experimental results show that our heuristic algorithm can reduce the leakage current up to 59.5{\%} and can find the optimal solutions on most of the small MCNC benchmark circuits. Moreover, the required CPU time of our probability-based program is significantly less than that of a random search program.",
author = "Tsung-Yi Wu and Tzeng, {Jr Luen}",
year = "2007",
month = "1",
day = "1",
doi = "10.1093/ietfec/e90-a.12.2718",
language = "English",
volume = "E90-A",
pages = "2718--2726",
journal = "IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences",
issn = "0916-8508",
publisher = "Maruzen Co., Ltd/Maruzen Kabushikikaisha",
number = "12",

}

TY - JOUR

T1 - A fast probability-based algorithm for leakage current reduction considering controller cost

AU - Wu, Tsung-Yi

AU - Tzeng, Jr Luen

PY - 2007/1/1

Y1 - 2007/1/1

N2 - Because the leakage current of a digital circuit depends on the states of the circuit's logic gates, assigning a minimum leakage vector (MLV) for the primary inputs and the flip-flops' outputs of the circuit that operates in the sleep mode is a popular technique for leakage current reduction. In this paper, we propose a novel probability-based algorithm and technique that can rapidly find an MLV. Unlike most traditional techniques that ignore the leakage current overhead of the newborn vector controller, our technique can take this overhead into account. Ignoring this overhead during solution space exploration may bring a side effect that is misrecognizing a non-optimal solution as an optimal one. Experimental results show that our heuristic algorithm can reduce the leakage current up to 59.5% and can find the optimal solutions on most of the small MCNC benchmark circuits. Moreover, the required CPU time of our probability-based program is significantly less than that of a random search program.

AB - Because the leakage current of a digital circuit depends on the states of the circuit's logic gates, assigning a minimum leakage vector (MLV) for the primary inputs and the flip-flops' outputs of the circuit that operates in the sleep mode is a popular technique for leakage current reduction. In this paper, we propose a novel probability-based algorithm and technique that can rapidly find an MLV. Unlike most traditional techniques that ignore the leakage current overhead of the newborn vector controller, our technique can take this overhead into account. Ignoring this overhead during solution space exploration may bring a side effect that is misrecognizing a non-optimal solution as an optimal one. Experimental results show that our heuristic algorithm can reduce the leakage current up to 59.5% and can find the optimal solutions on most of the small MCNC benchmark circuits. Moreover, the required CPU time of our probability-based program is significantly less than that of a random search program.

UR - http://www.scopus.com/inward/record.url?scp=68249153624&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=68249153624&partnerID=8YFLogxK

U2 - 10.1093/ietfec/e90-a.12.2718

DO - 10.1093/ietfec/e90-a.12.2718

M3 - Article

VL - E90-A

SP - 2718

EP - 2726

JO - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

JF - IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

SN - 0916-8508

IS - 12

ER -